This page tutorial provides an in-depth technical review of AFDX protocols and implementations. One thousand times faster than previous ARINC Avionics Full-Duplex Switched Ethernet (AFDX) is a data network, patented by international . ARINC part 7(AFDX) Tutorial (video) from Excalibur Systems Inc. Embvue AFDX | Arinc by Embvue; AFDX/ARINC Tutorial from GE. AFDX/ARINC Protocol Tutorial. Table of Contents Chapter 1 Overview The Antecedents What is AFDX? Other Avionics Buses ARINC MIL-STD

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The document has been checked carefully and is thought to be entirely reliable. However, no responsibility is assumed in case of inaccuracies. Trademark Notice Product and other trademark names referred sfdx within this manual are the property of their respective trademark holders.

AFDX network architecture Figure 2: VL scheduling with jitter Figure 5: Sub-VL Concept Figure 6: AFDX protocol stack Figure 7: AFDX frame structure Figure 8: Bandwidth constraints of messages on the same Tutoriall Formula 2: Example using Formula 1 for two messages on the same VL Formula 3: AFDX message network load Formula 4: Bandwidth constraints from a message point of view Tuhorial 5: Standard for protocols on top of IEEE The description will provide the reader with an overview of the fundamentals of the AFDX network architecture, network protocol, network communication concept and network reliability.

AFDX / ARINC Tutorial – PDF

However, the specialties of the Boeing standard are not described herein. It is assumed that the reader, as a minimum, is familiar with the principles of data communication. In particular, knowledge of the Ethernet communication standard is a definite advantage to understand the contents of this tutorial. A guaranteed bandwidth, limited jitter, upper bounded tutoiral latency and a low BER typicallyi. New generation aircraft such as the A, A, B and AM are required to feature more sophisticated functions than previous aircraft generations.

For reasons of weight savings, less required afdxx as well as reduced maintenance costs it tutoria, desired to implement as much functionality as possible in avionics. This leads to more complex avionics systems that need to process more data than legacy systems, and consequently a need for ADNs with higher available bandwidths arises.

AFDX / ARINC 664. Tutorial

Another important attribute of afsx ADN is the required wiring. The less wiring required, the less its weight which leads to a more fuel efficient aircraft. Finally, the cost of an ADN’s development and deployment is an important factor as well. Traditionally, ADNs have been based on new technologies specifically developed for the purpose, thereby making the ADN development very expensive.

Meanwhile, it has become much more desirable to utilize already existing commercial technologies more or less adapted to the requirements of ADNs. The purpose of this is not only to benefit from the lower costs of COTS equipment, but also to take advantage of the fact that COTS equipment is already field-proven. For the new generation A, none of these ADNs would fulfill the aircraft’s demanding requirements to a high available bandwidth, minimum wiring to reduce the weight and low development cost.

Meanwhile AFDX is not only used on the A but also on the Airbus M military transport aircraft and the Boeing Dreamliner, the latter, however, with some minor extensions to the standard. This shows a broad appliance and acceptance of the AFDX technology leading to reduced cost of AFDX equipment, thus making it even tytorial attractive to deploy this technology.

Since conventional Ethernet is not a deterministic network, AFDX had to be extended to ensure a deterministic behavior and a high reliability in order to comply tutoriak the stringent requirements to ADNs.

AFDX ensures a deterministic behavior through traffic control. Traffic control is achieved by guaranteeing the bandwidth of each logical communication channel, called a Virtual Link VLthereby addx the jitter and transmit latency. At any one time AFDX will only forward one data stream to the upper layers, and automatically exclude an erroneous data stream from being forwarded.

With these characteristics AFDX ensures a BER as low as while providing a bandwidth up to Mbps thereby fulfilling the requirements of new generation aircraft avionics in terms of reliability and available bandwidth. The heart of each AFDX network is the switch which establishes physical links between all the ESs connected to the switch. The switch is capable of forwarding data from any connected ES to one or more other ESs connected to the switch.


However, which incoming data will in fact be forwarded to which ESs depends on the switch configuration which establishes the logical communication links between ESs. Based on its configuration, the switch also polices that the bandwidth allocated to each communication link is not exceeded. If the switch detects that the bandwidth of a communication link is exceeded, data is dropped i. This ensures that correctly working ESs not violating the switch configuration are guaranteed their allocated bandwidth.

In a properly configured and working AFDX qfdx, a violation of the switch configuration will never occur. Zfdx, if an ES for wfdx reason or another starts to malfunction, it could tktorial the switch to get flooded with data which it will then handle according to its bandwidth limitation policing. As an example, a malfunction of an ES tutofial cause tytorial to send an erroneous data stream on network A, while tutogial identical but faultless data stream is also sent on network B.

Since all ESs eavesdropping on this data receive both the erroneous as well as the valid data stream, one of the two has to be eliminated in any case. Due to the inherent data integrity checking of all eavesdroppers, the erroneous data stream is automatically eliminated and only the valid data stream is passed on to the upper layers.

In tutorkal example the network A data is eliminated while the network B data is forwarded and further processed. According to the standard, an AFDX switch must be equipped with at least 20 ports, i.

AFDX® Specification Tutorial | AIM – Online

Physical topology of AFDX As depicted in Figure 2, each channel of an ES is connected to a switch port via a cable containing two twisted pair wires interconnecting the input and output ports of the ES and switch. For reasons of simplicity Figure 2 only depicts one of the two networks, i. The second network has an analogue interconnection; however, it uses the ES’s second channel and a second switch.

In the example, the three messages are uniquely identified as follows: However, from a system or application point of view, it is possible to establish many logical communication links, called Virtual Links VLwhich behave like physical links hence the name Virtual Link although adx all make use of one and the same physical link. Thus, Affx make it possible to afdd a sophisticated network communication while ensuring a deterministic behavior through VL bandwidth policing carried out by the switch.

The same receive VLs, however, can be assigned to several ESs meaning that these can be eavesdropping on the same data. Each VL is like a flow of tutlrial and with multiple VLs there are multiple flows of frames that have to be multiplexed into a single flow of frames. The BAG is a timeslot confining the VL’s bandwidth by defining the minimum gap time between two consecutive frames. The BAG value must be tutrial the range ms and must be a power of 2.

The jitter is an upper bounded transmit latency appearing as a frame time offset tutoril the BAG. The frame time offset is introduced by the contention of data during VL scheduling, as well as by delays caused by the switch processing.

AFDX® Overview

Figure 4 illustrates the scheduling of three frames with different jitter on the same VL. Sub-VLs can be used to reduce latency of short messages, such as sampling messages, against bulk messages, such as queuing messages.

This ensures that the frames in the Sub-VL queues are evenly distributed onto the VL queue and later onto the physical link. The communication port provides two types of services, namely the queuing and the sampling services which are both based on UDP. The communication ports as well as the SAP ports can be defined as either receive or transmit ports. As a consequence all incoming messages on a sampling port overwrite the previous message afdz of whether it was already retrieved by the host application or not.

The host application can retrieve the sampling port’s message buffer at any time and will always retrieve the last message received by the sampling port.


When no new messages are received, the host application will get the last message received every time it s retrieving the message buffer. Transmit Sampling Ports A transmit sampling port continuously transmits the last message written to the port by the host application.

When the host application writes a new message to the sampling port, the previous message on the sampling port is overwritten by the new message which from then on is continuously transmitted according to the sampling port’s schedule. Receive Queuing Ports A tutorila queuing port appends received messages to the port’s message queue.

As opposed to the sampling port it guarantees that no messages are overwritten. The host tutoriql can retrieve messages from the message buffer tutoriaal any time, and upon doing so the respective message is removed from the message queue. The message queue is a FIFO queue, thereby ensuring that the host application will retrieve the messages in the same order they were received by the queuing port.

The messages are transmitted as fast as possible and then removed from the message queue. New transmit messages written by the host application to the queuing port are appended to the tuhorial queue.

An exhausted message buffer stops further transmission. However, it is possible to tuforial AFDX frames that exceed the maximum transmit frame size. Frames conveying sampling port messages are not allowed to exceed the bytes limit, thus no fragmentation is required. However, frames conveying queuing port messages are allowed to be up to 8KBytes large, thus requiring that these frames when exceeding the limit must be divided into fragments transmitted one after the other.

Fragmentation and re-assembly is inherent in the AFDX implementation and is thus not managed by the host application. The only difference is the socalled Sequence Number SN which can optionally be inserted as the last byte of the Ethernet payload. The function of the SN is explained in later chapters. Although TCP is a connection-oriented protocol providing transmission error control, this is not required since the AFDX bandwidth policing and redundancy management ensures a very low frame loss probability.

Figure 6 depicts the AFDX protocol stack with its different layers. The preamble consists of alternating 0 and 1 bits that give the receiving ESs time for synchronization and otherwise prepare for reception of the actual frame. After the MAC addresses follows the EtherType field tutorkal is used to indicate which protocol type is transported in the Ethernet frame.

Since the Ethernet frame is specified to be in the range of 64 to bytes, the ADFX payload must consequently be in the range 17 to bytes. Furthermore, by using padding it’s possible to specify the AFDX payload down to 0 bytes. The receiving ES uses the same algorithm to calculate the checksum and compare it with the received checksum. If the two checksums are not identical the receiving ES discards the frame.

The IFG is specified to be 96 bit times, i. However, in order to improve reliability even further, the AFDX network has a double, i. The purpose of the redundant network is to mitigate the consequences of potential network tuotrial caused by e.

Since ultimately only one valid data stream is required by the ES application, a handling of the redundant streams is required. As depicted in Figure 8, the ES implements Integrity Checking IC and Redundancy Management RM to ensure data integrity and that only one data stream is forwarded to the upper protocol layers and from there to the application.

The IC is always enabled and futorial done independently of the RM, also if the RM is turned off and both networks are used independently of each other.

Prior to transmission, the SN is incremented by one for each consecutive frame whether fragmented or not on the same VL. Upon a reset or start-up of the transmitting ES, the SN is set to 0 in the first transmitted thtorial.